搜索资源列表
Delta_sigma_PA
- A simulation of delta sigma modulator for digital power amplifier applications.
Matlab-simulink-based-sigma-delta
- 关于sigma-delta调制的MATLAB仿真程序和simulink仿真-About sigma-delta modulation MATLAB simulation simulink simulation program and
pll_sigma-delta
- 这是用simulink仿真的一个小数分频锁相环（fraction_N PLL），使用了sigma-delta modulator和8/9预分频，这只是其中一部分，如果再想实现细节，还有待更深入，可以联系我qq790290115-fraction_N PLL using simulink(2013a),it includes sigma-delta modulator and 8/9 prescaler
sigma-delta-modulation
- 高精度、低功耗模数转换器是当今集成电路设计模拟领域的研究热点之一，采用sigma-delta调制原理和过釆样原理的模数转换器广泛使用在音频、数字网络、电子测量等系统中。此类模数转换器，为降低信号带内的量化噪声功率，而釆用噪声整形技术，为提高模数转换器的信噪比，使用过采样技术，将基带中的量化噪声调制到了高频区域，这样就增加了基带中的信噪比，也就是增加了转换器的有效量化位数，由于采用较高的过采样率，Sigma-Delta ADC的转换速率相对较低，高精度和较低转换速率的特点，使得Sigma-Delt
delsig
- matlab code for Delta Sigma Toolbox
paper4
- Using Delta-Sigma Modulators in Visible Light OFDM Systems
data-integrity
- Asahi Kasei AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC.
hermes_rid
- AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC.
LTC2440_1
- 一款具有 5ppm INL 和 5μV 偏移的高速 24 位无延迟增量累加 (No Latency ΔΣTM) ADC LTC2440的源代码-A 5ppm INL and 5 V high speed 24 bit offset without delay increment accumulation (No Latency TM ADC LTC2440 delta sigma) source code
Accelerometer_AIs_RT
- cRIO FPGA example with FIFOs. Demonstration of fast data streaming through fifo. The FPGA Templates section has one template for Delta Sigma based modules and one template for SAR based modules. Under the FPGA target you will also find the DMA Channe
eachpart
- Simulink delta sigma modulator- each stage output
firstorder
- delta sigma modulator-first order
sigma-delta-modulator
- 实现SIGMA-DELTA Modulator的veriolog代码-sigma-delta moudulator for RFPLL
Best-of-Bakers-Best-(precision-data-converters).z
- Data converters bridge the space between the analog and digital domains in your circuits. This feat is done with analog-to-digital and digital-to-analog converters. With this book chapter, the definition of delta-sigma analog-to-digital converter
ADS1299
- TI公司的ADS1299是8路低噪音同时取样的24位delta-sigma ADC,并内置了可编程增益放大器(PGA),基准电压和振荡器,集成了脑电图(EEG)所需的通用特性.器件具有非常低的输入参考噪音:1.0 μVPP (70-Hz BW),没路的功耗5mW,输入偏置电流300pA,数据速率250SPS到16kSPS,C1.0 μVPP (70-Hz BW),CMMR为-110dB,可编程增益为1, 2, 4, 6, 8, 12或24,单极或双极电源工作,主要用在医疗仪器如EEG和ECG,听
DeltaSigma Converter with Analog Comparator
- Delta-Sigma converter with comparator and RRC circuit
Sigma_Delta_ADD
- Sigma Delta Adder and Corrector, implemented using matlab
filter loop
- sigma-deltaADC的环路滤波器设计FPGA实现(realise sigma-delta ADC and it filter)
Sigma_Delta
- sigma delta 调制器 滤波器设计(present a series of Simulink models to design a high-level behavioral model of a Sigma-Delta ADC)
ADS1252
- The ADS1252 is a precision, wide dynamic range, deltasigma, Analog-to-Digital (A/D) converter with 24-bit resolution operating from a single +5V supply. The delta-sigma architecture is used for wide dynamic range and to ensure 24 bits of no missi